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Capacitance Measurement in NMOS Transistor | Simulation using Cadence gpdk180nm Technology (v-04)

In this video, we explore the capacitance characteristics of an NMOS transistor with a width (W) of 6μm and various channel lengths (L = 0.18μm, 0.36μm, 0.72μm, 1μm, and 2μm). A DC sweep of VGS from 0 to 1.8V is performed with a step size of 0.18V. We analyze: gm/gds vs. gm/Id Cgg/W vs.gm/Id Css/W vs.gm/Id Cdd/W vs. gm/Id This simulation provides insights into how capacitances vary with VGS and how the transconductance-to-current ratio changes based on the threshold voltage. 💡 Simulation setup and analysis performed using Cadence gpdk180nm technology. Stay tuned for detailed plots and analysis! If you like this content, don't forget to like, comment, and subscribe for more electronics simulations!